Reconfigurability in AI Hardware Accelerators for Energy-Efficient Biosignal Analysis
The rapid advancement of artificial intelligence (AI) technologies has led to significant innovations in healthcare, particularly in the domain of biosignal analysis. This work investigates the design and implementation of reconfigurable AI hardware accelerators, specifically tailored for energy-efficient biosignal analysis, with a primary focus on electrocardiogram (ECG) classification aimed at detecting atrial fibrillation, a cardiac arrhythmia with a prevalence of 2 percent and severe impact (e.g., strokes, increased mortality). As a classification method, a convolutional neural network (CNN) is used. The scope of this work is to address critical research questions concerning the balance between reconfigurability and efficiency, such as requirements from the medical use-case, analyzing the needed level of reconfigurability, automating the design process, and optimization with respect to energy efficiency, area requirements, and latency. First, a comprehensive analysis of existing algorithms used in ECG classification is conducted, identifying key constraints and requirements for hardware implementation. This analysis serves as the foundation for defining the necessary level of reconfigurability in AI hardware accelerators. A conceptual framework is developed, focusing on specialized arrays that integrate optimized configurable logic blocks (CLBs). These blocks are designed to enhance computing performance while minimizing energy consumption, addressing the dual objectives of efficiency and flexibility. For estimation, a model for comparing area and energy requirements of CLB architectures is developed and validated using a convolution with four inputs, achieving a factor of 2.23 improvement in silicon area and 2.02 in energy efficiency compared to standard FPGA architectures. The methodology proposed in this dissertation is compared against standard FPGA implementations. The results demonstrate substantial improvements in energy efficiency and silicon area utilization, underscoring the effectiveness of the proposed reconfigurable hardware solution. As an optimized array for CNN inference the hardware solution is defined as a Field Programmable Neural Array (FPNA). Specifically, for the small CNN, the ratio between an ASIC implementation and FPNA implementation is 214.72 for silicon area and 210.08 for energy per inference. When comparing custom and standard arrays, the ratio has decreased to factors of 1.44 and 1.38, respectively. Similar results are observed for the full-scale CNN with ratios of 1.47 and 3.10. These comparisons highlight the advantages of the custom array with specialized logic blocks in optimizing energy efficiency and silicon area utilization, which are critical for enabling continuous monitoring in wearable healthcare devices. Furthermore, the findings of this research have broader implications for AI-driven healthcare applications. The flexible and efficient hardware solutions developed herein can be adapted for various biosignal processing tasks beyond ECG classification, including photoplethysmogram (PPG) analysis and feature-based classification using a CNN. The hardware implementation exhibits a speedup factor of 731.0 for PPG and 1082.3 for feature-based classification. Energy savings are substantial, with 99.8 percent for the test CNN and 96.6 percent per inference for PPG applications. This adaptability positions the proposed hardware accelerators as versatile tools in the evolving landscape of personalized medicine and remote health monitoring. Additionally, the methods can be used in the industrial context for time series classification, e.g., in predictive maintenance. In image classification is also investigated with positive results. In conclusion, this dissertation contributes to the advancement of AI hardware accelerators by providing a framework for reconfigurability and efficiency in biosignal analysis. The integration of optimized logic blocks and high-level synthesis tools represents a step forward in the development of energy-efficient, flexible hardware solutions. These innovations hold promise for enhancing the capabilities of smart patch devices and expanding the reach of AI technologies in healthcare and beyond, ultimately improving patient outcomes through more accurate and timely diagnostic